Enhanced analog/RF performance of hybrid charge plasma based junctionless C-FinFET amplifiers at 10 nm technology node

IF 1.9 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Microelectronics Journal Pub Date : 2023-01-01 DOI:10.1016/j.mejo.2022.105662
Kallolini Banerjee, Abhijit Biswas
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引用次数: 3

Abstract

We report a novel hybrid complementary metal-oxide semiconductor (CMOS) amplifier (H-CA) combining charge plasma based junctionless (CP) n-FinFET and conventional junctionless (JL) p-FinFET and compare its analog/RF performance with JL FinFETs at 10-nm technology node. The CP FinFETs are found to exhibit improved unity gain cut-off frequency (FT) and transconductance frequency product (TFP) compared to JL FinFETs. To evaluate the performance improvement of hybrid CMOS amplifier we compare three different amplifiers, in terms of voltage gain and gain band-width. Our investigations reveal that the voltage gain of the proposed H-CA exhibits significant improvement of ∼40.02%, relative to its equally sized JL-CA value, at VBias = supply voltage (VDD)/2. Moreover, the GBW of the H-CA exhibits ∼41.67% enhancement evaluated at VBias = VDD/2 alongside showing better stability to variation in bias voltage compared to its JL counterpart. Thus CP based nanoscale CMOS amplifiers could be used for future high performance analog/RF applications.

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基于混合电荷等离子体的无结C-FinFET放大器在10nm技术节点上增强的模拟/RF性能
我们报道了一种新的混合互补金属氧化物半导体(CMOS)放大器(H-CA),它结合了基于电荷等离子体的无结(CP)n-FinFET和传统的无结型(JL)p-FinFET,并在10nm技术节点上将其模拟/RF性能与JL FinFET进行了比较。发现与JL FinFET相比,CP FinFET表现出改进的单位增益截止频率(FT)和跨导频率乘积(TFP)。为了评估混合CMOS放大器的性能改进,我们在电压增益和增益带宽方面比较了三种不同的放大器。我们的研究表明,在VBias=电源电压(VDD)/2时,相对于同等大小的JL-CA值,所提出的H-CA的电压增益显著提高了~40.02%。此外,H-CA的GBW在VBias=VDD/2时表现出约41.67%的增强,同时与JL相比,对偏置电压变化表现出更好的稳定性。因此,基于CP的纳米级CMOS放大器可以用于未来的高性能模拟/RF应用。
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来源期刊
Microelectronics Journal
Microelectronics Journal 工程技术-工程:电子与电气
CiteScore
4.00
自引率
27.30%
发文量
222
审稿时长
43 days
期刊介绍: Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.
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