Fine-Pitch Capabilities of the Flat Ultra-Thin Chip Packaging (UTCP) Technology

J. Govaerts, E. Bosman, W. Christiaens, J. Vanfleteren
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引用次数: 16

Abstract

This paper describes the fine-pitch interconnection capabilities of the ultra-thin chip packaging (UTCP) technology, a technology under development for embedding thin chips in a flexible polyimide (PI) substrate. It allows for fully flexible electronics, as the rigid chips are thinned down to 20-30 ¿m, at which point they become truly flexible themselves. This way, instead of just a flexible substrate with rigid components assembled on top, the entire circuitry can be incorporated inside a 30-40 ¿m thin chip package. The paper briefly introduces the technology's background with a short description of the fabrication process. Building on the developments already achieved, some further optimizations are discussed, and the technology is tested for its fine-pitch interconnection capabilities using test chips with four-point probe and daisy chain patterns, with a pitch down to 40 ¿m. The possibility to package several chips in the same substrate is investigated, as well, and finally an outlook on future experiments is briefly discussed.
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扁平超薄芯片封装(UTCP)技术的细间距性能
本文描述了超薄芯片封装(UTCP)技术的细间距互连能力,这是一种正在开发的将薄芯片嵌入柔性聚酰亚胺(PI)衬底的技术。它允许完全柔性的电子产品,因为刚性芯片被薄到20-30米,在这一点上,它们本身就变得真正柔性。这样,整个电路就可以被集成到一个30-40米的薄芯片封装中,而不是仅仅是一个柔性基板和刚性组件组装在上面。本文简要介绍了该技术的背景,并对其制作过程进行了简要说明。在已经取得的进展的基础上,讨论了一些进一步的优化,并使用带有四点探针和菊花链模式的测试芯片测试了该技术的细间距互连能力,间距低至40微米。研究了在同一衬底上封装多个芯片的可能性,最后简要讨论了对未来实验的展望。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
IEEE Transactions on Advanced Packaging
IEEE Transactions on Advanced Packaging 工程技术-材料科学:综合
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