Aligning Chips Face-to-Face for Dense Capacitive and Optical Communication

J. Cunningham, A. Krishnamoorthy, I. Shubin, Xuezhe Zheng, M. Asghari, D. Feng, James G. Mitchell
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引用次数: 16

Abstract

We report a new method that precisely self-aligns face-to-face semiconductor chips or wafers to enable communication between the chips using electromagnetic waves. Our alignment mechanism takes advantage of miniaturized versions of two of nature's idealized shapes: an inverse pyramidal shape defined by a self-terminating wet-etch process in silicon and micro-spheres with radii accurate to submicron accuracy. This approach allows chips to be packaged using passive alignment that is self locating and reaches nearly one micron level of chip misalignment tolerance. Packages for applications to capacitive and optical connections are presented. Additionally, we describe a physical architecture for a multi-chip array packages with ¿bridge¿ and ¿island¿ chips where the function of the bridge is to transfer electromagnetic signals between island chips using either capacitive or optical proximity communication. The bridge chip can provide a predetermined amount of compliance to help maintain alignment and thereby accommodate topology variants in first level package or in chip thickness when required. Experimental packages providing precise alignment between 1-D arrays and 2-D arrays of chips are presented. We show that our precision alignment mechanism enables high fidelity 10 Gb/s optical-proximity-communication with reflecting mirrors micro-machined into Silicon and co-integrated to low loss silicon-on-insulator waveguides for chip-to-chip communication. The alignment mechanism was also applied to a demonstration of chip-to-chip capacitive proximity communication in a linear array of six chips. Alignment measurements on a 4 × 4 array of chips are reported.
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面向密集电容和光通信的芯片面对面对齐
我们报告了一种新的方法,可以精确地自对准面对面的半导体芯片或晶圆,使芯片之间使用电磁波进行通信。我们的对准机制利用了自然界两种理想形状的小型化版本:由硅和微球的自终止湿蚀刻工艺定义的反金字塔形状,其半径精确到亚微米精度。这种方法允许芯片封装使用被动对准,是自我定位和达到近一微米水平的芯片错位公差。介绍了用于电容和光学连接的封装。此外,我们描述了具有桥接和岛接芯片的多芯片阵列封装的物理架构,其中桥接的功能是使用电容或光学近距离通信在岛接芯片之间传输电磁信号。桥接芯片可以提供预定数量的遵从性,以帮助保持对齐,从而在需要时适应第一级封装或芯片厚度的拓扑变体。实验包提供精确对准之间的一维阵列和二维阵列的芯片。我们表明,我们的精密对准机制可以实现高保真的10gb /s光近距离通信,反射镜微加工成硅,并与低损耗绝缘体上硅波导协集成,用于芯片对芯片通信。该对准机制还应用于在6个芯片的线性阵列中进行芯片对芯片电容接近通信的演示。报道了在4 × 4阵列芯片上的对准测量。
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来源期刊
IEEE Transactions on Advanced Packaging
IEEE Transactions on Advanced Packaging 工程技术-材料科学:综合
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审稿时长
6 months
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