Electronic Packaging Materials for Extreme, Low Temperature, Fatigue Environments

Abstract

Electronic packaging technology has been developed to withstand extreme temperature fatigue conditions from - 120°C to + 85°C for over 1500 cycles. This temperature regime and number of thermal cycles exceeds typical military standard (MIL-STD) testing from - 55°C to + 125°C and approximately 100 cycles. Chip-on-board (COB) packaging was selected since it reduces mass (up to 98% savings) and increases functionality on a smaller surface area (as low as 40%) compared to standard surface mount packaging technology (SMT). Material combinations of different encapsulants, die attaches, and substrates for bare silicon die with 1 mil Au wire bonds were designed and continuously monitored in situ during thermal cycling. This paper will describe experimental and modeling results of surviving material combinations and key failures that occurred at various temperatures and cycle counts.