{"title":"Ferroelectric FET Based TCAM Designs for Energy Efficient Computing","authors":"Xunzhao Yin, D. Reis, M. Niemier, X. Hu","doi":"10.1109/ISVLSI.2019.00085","DOIUrl":null,"url":null,"abstract":"As Moore's law based device scaling and accompanying performance scaling trends slow down, there is increasing interest in new technologies and computational paradigms that enable faster and more energy-efficient information processing. Meanwhile, there is growing evidence that in the context of traditional Boolean circuits and/or von Neumann architectures, it will be challenging for beyond-CMOS devices to compete with the CMOS technology. Exploiting the unique characteristics of emerging devices – especially in the context of alternative circuits and architectural paradigms – has the potential to offer orders of magnitude improvement in terms of energy and/or performance. In this work, we show how our research work has leveraged the unique characteristics of emerging devices to build efficient circuits and architectures with significant improvements in energy and performance for various data-intensive applications. Specifically, we consider Ferroelectric FETs (FeFETs) which are nonvolatile and can function as both a transistor and a storage element. This unique property enables FeFETs to be used for building area efficient and low-power ternary content addressable memories (TCAMs). TCAMs are desirable in many applications including network routers and cognitive learning tasks. Using models calibrated by experimentally demonstrated ferroelectric material or device, as well as detailed circuit simulations, we show that the FeFET-based TCAMs we proposed can enable orders of magnitude improvements in energy efficiency and performance when considering array-level computing tasks in the IoT domain.","PeriodicalId":6703,"journal":{"name":"2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)","volume":"252 1","pages":"437-442"},"PeriodicalIF":0.0000,"publicationDate":"2019-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISVLSI.2019.00085","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7
Abstract
As Moore's law based device scaling and accompanying performance scaling trends slow down, there is increasing interest in new technologies and computational paradigms that enable faster and more energy-efficient information processing. Meanwhile, there is growing evidence that in the context of traditional Boolean circuits and/or von Neumann architectures, it will be challenging for beyond-CMOS devices to compete with the CMOS technology. Exploiting the unique characteristics of emerging devices – especially in the context of alternative circuits and architectural paradigms – has the potential to offer orders of magnitude improvement in terms of energy and/or performance. In this work, we show how our research work has leveraged the unique characteristics of emerging devices to build efficient circuits and architectures with significant improvements in energy and performance for various data-intensive applications. Specifically, we consider Ferroelectric FETs (FeFETs) which are nonvolatile and can function as both a transistor and a storage element. This unique property enables FeFETs to be used for building area efficient and low-power ternary content addressable memories (TCAMs). TCAMs are desirable in many applications including network routers and cognitive learning tasks. Using models calibrated by experimentally demonstrated ferroelectric material or device, as well as detailed circuit simulations, we show that the FeFET-based TCAMs we proposed can enable orders of magnitude improvements in energy efficiency and performance when considering array-level computing tasks in the IoT domain.