{"title":"Towards reliability improvement for nanoelectronic circuits using gate replication","authors":"Chunhong Chen, F. Zhou","doi":"10.1109/NANO.2007.4601262","DOIUrl":null,"url":null,"abstract":"To make digital circuits with unreliable devices more reliable has been a big challenge, especially for today's nanoelectronic circuit design. This paper presents a gate replication architecture towards increasing the reliability of individual nano-scale digital logic gates. We focus on deriving the fundamental relationship between gate replication and reliability improvement, and report both theoretical analysis and experimental results.","PeriodicalId":6415,"journal":{"name":"2007 7th IEEE Conference on Nanotechnology (IEEE NANO)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 7th IEEE Conference on Nanotechnology (IEEE NANO)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NANO.2007.4601262","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
To make digital circuits with unreliable devices more reliable has been a big challenge, especially for today's nanoelectronic circuit design. This paper presents a gate replication architecture towards increasing the reliability of individual nano-scale digital logic gates. We focus on deriving the fundamental relationship between gate replication and reliability improvement, and report both theoretical analysis and experimental results.
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