{"title":"A New Integrated K-Band Analog Vector Sum Phase Shifter","authors":"Fatemeh Akbar, A. Mortazawi","doi":"10.1109/MWSYM.2018.8439362","DOIUrl":null,"url":null,"abstract":"This paper presents a new analog vector sum phase shifter where the phases of the orthogonal vectors $I$ and $Q$ as well as their amplitude ratio are varied simultaneously to control the vector sum phase. As a proof of concept, a phase shifter with a single-ended input and differential outputs is fabricated at K-band in 130-nm CMOS process. All the tasks of vector (I and Q) generation, vectors' amplitude and phase variation, and vector summation are performed in a single block (phase shifter core) to reduce power consumption and chip real estate. The phase shifter provides 300° of continuous phase tuning with an average insertion loss of 6.7 dB at 23 GHz and total power consumption of 18.5 mW while occupying an on-chip area of $\\mathbf{0.64\\times0.68\\ mm^{2}}$ (excluding the pads). The phase shifter core consumes only 7.8 mW, and its corresponding area is $\\mathbf{0.15\\times 0.3\\ mm^{2}}$.","PeriodicalId":6675,"journal":{"name":"2018 IEEE/MTT-S International Microwave Symposium - IMS","volume":"2016 1","pages":"1441-1444"},"PeriodicalIF":0.0000,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE/MTT-S International Microwave Symposium - IMS","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSYM.2018.8439362","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
This paper presents a new analog vector sum phase shifter where the phases of the orthogonal vectors $I$ and $Q$ as well as their amplitude ratio are varied simultaneously to control the vector sum phase. As a proof of concept, a phase shifter with a single-ended input and differential outputs is fabricated at K-band in 130-nm CMOS process. All the tasks of vector (I and Q) generation, vectors' amplitude and phase variation, and vector summation are performed in a single block (phase shifter core) to reduce power consumption and chip real estate. The phase shifter provides 300° of continuous phase tuning with an average insertion loss of 6.7 dB at 23 GHz and total power consumption of 18.5 mW while occupying an on-chip area of $\mathbf{0.64\times0.68\ mm^{2}}$ (excluding the pads). The phase shifter core consumes only 7.8 mW, and its corresponding area is $\mathbf{0.15\times 0.3\ mm^{2}}$.