Model-Based Design Methodology for Early Evaluation of Real-time and Embedded Constraints

F. Ribeiro, A. Rettberg, C. Pereira, Charles Steinmetz, M. S. Soares
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Abstract

When developing Real-Time and Embedded Systems (RTES), different types of constraints should be considered in specification, modeling, architectural design and system implementation. In most cases, these constraints describe timing, precedence or resource restriction. Correct description and evaluation of these complex information along of RTES design are directly related to their reliability, safety and quality. In this research, a methodology to describe real-time and embedded information in requirements, functional, logical and technical viewpoints is briefly presented, as well as an approach to analyze the annotated constraints. MARTE constraints have been consistently applied in designing models and implemented at lower abstraction models. Here, pseudo automated generation of timing, precedence and resources constraints is performed from the graphical models to the final source code models. Therefore, the proposed approach has a great value to RTES design once it has traced constraints along of the architectural design and it also presents a manner to check if constraints are being reached in accordance with early design description.
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基于模型的实时和嵌入式约束早期评估设计方法
在开发实时和嵌入式系统(RTES)时,应在规范、建模、架构设计和系统实现中考虑不同类型的约束。在大多数情况下,这些约束描述时间、优先级或资源限制。在RTES设计过程中对这些复杂信息的正确描述和评价,直接关系到RTES的可靠性、安全性和质量。在本研究中,简要介绍了从需求、功能、逻辑和技术角度描述实时和嵌入式信息的方法,以及分析注释约束的方法。MARTE约束一直应用于设计模型,并在较低抽象模型中实现。在这里,时序、优先级和资源约束的伪自动化生成将从图形模型执行到最终的源代码模型。因此,所提出的方法对RTES设计具有很大的价值,一旦它跟踪了建筑设计的约束,它还提供了一种检查约束是否按照早期设计描述达到的方法。
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