{"title":"High Throughput Parallel-Pipeline 2-D DCT/IDCT Processor Chip","authors":"G. Ruiz, J. A. Michell, A. Burón","doi":"10.1007/s11265-006-9764-7","DOIUrl":null,"url":null,"abstract":"","PeriodicalId":88019,"journal":{"name":"Journal of VLSI signal processing systems for signal, image, and video technology","volume":"53 1","pages":"161-175"},"PeriodicalIF":0.0000,"publicationDate":"2006-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of VLSI signal processing systems for signal, image, and video technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1007/s11265-006-9764-7","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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