Design of 2∶1 multiplexer and 1∶2 demultiplexer using magnetic tunnel junction elements

Abstract

Spintronic devices are based on the up and down spin of an electron rather than on the charge of electrons as in traditional electronic devices. In principle, they primarily have higher speed, low power consumption, non-volatile storage and high integration density as compared to transistor based devices. A Magnetic Tunnel Junction (MTJ) is one such spintronic device which is not only used for memory storage but also for computation of logic functions. A multiplexer is an integral part of various digital logic circuits such as a FPGA. In the present paper, a novel architecture of a 2:1 multiplexer using only two MTJ elements, interconnected by a nano-magnetic channel has been designed. The corresponding demultiplexer has also been presented. HSPICE simulation is shown to verify the functionalities of the proposed circuits.