A 77GHz CMOS Down-Conversion Mixer with High CG Using CCPT-SPT Structure

Abstract

This paper presents a 76–81 GHz down-conversion mixer designed in 65 nm CMOS process. To enhance the load impedance and improve the transconductance (gm) of the transconductance stage, a novel mixer structure is proposed. The presented mixer includes an enhanced Gilbert-cell core with series peaking inductors for reducing noise and intermediate frequency (IF) buffer. The load stage is cross-coupled with PMOS transistors (CCPT) in parallel, and the gm stage is stacked with PMOS transistors (SPT). Under the power of 1 dBm local oscillator (LO), the input third-order intercept point (IIP3) is −8.34 dBm. The mixer consumes 8 mW under 1.2 V power supply. The LO-to-RF isolation is better than 40 dB at 76–81 GHz. At 77 GHz, the conversion gain (CG) and noise figure (NF) are 11.8 dB and 12.9 dB, respectively. Compared with conventional down-conversion mixers, the presented mixer is suitable for automotive radar with high CG and low NF.