{"title":"Robust Unsupervised Two Layered Network with RRAM Synapses for Image Recognition","authors":"A. Lele, P. Kumbhare, U. Ganguly","doi":"10.1109/icee44586.2018.8937982","DOIUrl":null,"url":null,"abstract":"Gradual synaptic weight change is a challenge for realistic RRAM, where SET is normally abrupt. Hence, an attractive RESET only learning scheme is demonstrated with a simple circuit implementation. However, the performance is highly sensitive to programming pulse and thus the RRAM characteristics. In this paper, we analyze the circuit implementation to show that performance sensitivity to RRAM programming is not fundamental. Our circuit analysis indicates that the winner-take-all (WTA) circuit malfunctions due to an insufficient time-resolution. Thus, the WTA circuit time-resolution needs to be co-optimized with RRAM and LIF neuron timescale. We experimentally measure a variety of programming characteristics of PCMO based RRAM by program-pulse engineering. We implement this strategy to demonstrate 100% performance irrespective of RRAM as opposed to previous work in a noisy angle learning and classification task. This essentially indicates that energy minimization of synaptic conductance change based on RRAM materials and pulse selection becomes the primary consideration - instead of RRAM gradual conductance change and range. Additionally, the constraint simplification leads to the reduction in energy consumption.","PeriodicalId":6590,"journal":{"name":"2018 4th IEEE International Conference on Emerging Electronics (ICEE)","volume":"4 1","pages":"1-5"},"PeriodicalIF":0.0000,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 4th IEEE International Conference on Emerging Electronics (ICEE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/icee44586.2018.8937982","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Gradual synaptic weight change is a challenge for realistic RRAM, where SET is normally abrupt. Hence, an attractive RESET only learning scheme is demonstrated with a simple circuit implementation. However, the performance is highly sensitive to programming pulse and thus the RRAM characteristics. In this paper, we analyze the circuit implementation to show that performance sensitivity to RRAM programming is not fundamental. Our circuit analysis indicates that the winner-take-all (WTA) circuit malfunctions due to an insufficient time-resolution. Thus, the WTA circuit time-resolution needs to be co-optimized with RRAM and LIF neuron timescale. We experimentally measure a variety of programming characteristics of PCMO based RRAM by program-pulse engineering. We implement this strategy to demonstrate 100% performance irrespective of RRAM as opposed to previous work in a noisy angle learning and classification task. This essentially indicates that energy minimization of synaptic conductance change based on RRAM materials and pulse selection becomes the primary consideration - instead of RRAM gradual conductance change and range. Additionally, the constraint simplification leads to the reduction in energy consumption.