Broadband LDMOS 40 W and 55 W integrated power amplifiers

Abstract

The performance of broadband microwave 40 W and 55 W LDMOS integrated power amplifiers is reported. A 30 V LDMOS process with 500 nm gate length was used for the design. Single and dual die packages were evaluated. A dual die package provides flexibility in output power and efficiency depending on combiner topology at the input and output of the circuit. Different saturated power and efficiency are obtained for different classes, Class A, AB and B operation and for different combiners, Wilkinson, quadrature or balun. Moreover, dual die in Doherty configuration provides a compact solution for better back-off efficiency in a symmetrical / asymmetrical topology. The 40 W design demonstrates 24 %, 1 dB fractional bandwidth around 2.1 GHz, and power added efficiency of 48 % at P-1 dB of 50 W. It showed excellent back-off linearity and best in class memory effect over frequency and temperature. The 55 W design has 28 %, 1 dB fractional bandwidth around 2.2 GHz, and power added efficiency of 49 % at P-1 dB equal to 63 W.