Look up Table Based Low Power Analog Circuit Testing

L. Maharana, T. Sarkar, S. Pradhan
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Abstract

In this paper, a method of low power analog testing is proposed. In spite of having Oscillation Based Built in Self-Test methodology (OBIST), a look up table based (LUT) low power testing approach has been proposed to find out the faulty circuit and also to sort out the particular fault location in the circuit. In this paper an operational amplifier, which is the basic building block in the analog circuit, is designed and is taken for testing purpose. Fault coverage is identified after fault modeling, fault injection and fault simulation. More than 93% fault coverage is achieved and there is a scope of increasing more fault coverage. Since analog testing prefaces the challenge of power dissipation during testing, some power minimization techniques like sleepy stack method and current correlation method have adhered during the testing process. Test power reduction up to 84 % is achieved in this work.
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查找表基于低功耗模拟电路测试
本文提出了一种低功耗模拟测试方法。在已有基于振荡的内建自检方法(OBIST)的基础上,提出了一种基于查找表(LUT)的低功耗测试方法来发现故障电路,并对电路中的特定故障位置进行分类。本文设计了一个运算放大器,它是模拟电路的基本组成部分,并用于测试。通过故障建模、故障注入和故障仿真,确定故障覆盖范围。故障覆盖率达到93%以上,并且故障覆盖率还在不断增加。由于模拟测试在测试过程中面临着功耗的挑战,因此在测试过程中坚持了一些功耗最小化技术,如休眠堆栈法和电流相关法。在这项工作中,测试功耗降低了84%。
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CiteScore
3.10
自引率
0.00%
发文量
29
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