Design of asynchronous NoC using 3-port asynchronous T-routers

Abstract

The importance of a Network On Chip (NoC) is increasing rapidly with the advent of System on Chip (SoC) design using Intellectual Property (IP). This is because it is hard to communicate with the IPs as they have different timing constrains and data rates. Energy usage of the on-chip interconnects is also a concern for many such SoCs targeting portable battery powered devices which necessitates design of an efficient NoC. This paper proposes an energy efficient simple asynchronous NOC design using 3-port T routers. The router has three pairs of switch and merge modules, connected in a T fashion.