Pub Date : 2015-07-16DOI: 10.1109/ICCPCT.2015.7159443
Gowri Prasad, K. K. Fousiya
Named Entity Recognition is the technique of identifying named entities which are present in documents like names of persons, percentage values, organization names, locations etc. Named Entity Recognition is used for information extraction. There are different approaches for performing the process of named entity recognition. This paper makes a comparative study of different approaches for named entity recognition applied to English and Hindi language corpus. This study is conducted with a view to extend the work and developing an efficient method for named entity recognition in Malayalam language.
{"title":"Named entity recognition approaches: A study applied to English and Hindi language","authors":"Gowri Prasad, K. K. Fousiya","doi":"10.1109/ICCPCT.2015.7159443","DOIUrl":"https://doi.org/10.1109/ICCPCT.2015.7159443","url":null,"abstract":"Named Entity Recognition is the technique of identifying named entities which are present in documents like names of persons, percentage values, organization names, locations etc. Named Entity Recognition is used for information extraction. There are different approaches for performing the process of named entity recognition. This paper makes a comparative study of different approaches for named entity recognition applied to English and Hindi language corpus. This study is conducted with a view to extend the work and developing an efficient method for named entity recognition in Malayalam language.","PeriodicalId":6650,"journal":{"name":"2015 International Conference on Circuits, Power and Computing Technologies [ICCPCT-2015]","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2015-07-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73878965","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-07-16DOI: 10.1109/ICCPCT.2015.7159416
V. R. Chandranadhan, G. Renjini
This paper introduces average current mode control of flyback rectifier with bidirectional switch. The proposed control scheme employs an outer voltage feedback loop, which maintains the output voltage as constant and an inner loop, which sense the input current. Average current mode control of flyback rectifier is suitable for obtaining a regulated output voltage with a varying input. Voltage equivalent of input current is averaged by using high gain current error amplifier, which again compared with the reference voltage. Reference voltage is produced by multiplying the rectified input voltage with the error output voltage. Gating pulse is generated by using this signal. This control method obtain better line and load regulation with the addition of inner current loop compared with voltage mode control. Also the rectified input voltage feedback achieves better input power factor. Conventional flyback rectifier is the inter connection of a diode bridge rectifier in the input side and a flyback converter. In order to obtain a highly efficient flyback rectifier with fewer losses an improved flyback rectifier is introduced. Here, two switches are connected in back to back to establish the bidirectional switch element, which will conduct both in the positive and negative half cycle of the ac input voltage. The transformer with dual output windings with a diode in each winding reduces the current stress across each diode. New topology adds an extra switch in the primary side and a diode in the secondary side. Improved bridgeless flyback rectifier only introduces a switch with common gate drive, a diode and an additional winding in the secondary side. Thus the weight of the converter is not affected with these additional components. Proposed average current mode control can be used as an adapter. Design and simulated waveforms are added in this paper for an output rating of 20V/1.5A.
{"title":"Average current mode control of improved bridgeless flyback rectifier with bidirectional switch","authors":"V. R. Chandranadhan, G. Renjini","doi":"10.1109/ICCPCT.2015.7159416","DOIUrl":"https://doi.org/10.1109/ICCPCT.2015.7159416","url":null,"abstract":"This paper introduces average current mode control of flyback rectifier with bidirectional switch. The proposed control scheme employs an outer voltage feedback loop, which maintains the output voltage as constant and an inner loop, which sense the input current. Average current mode control of flyback rectifier is suitable for obtaining a regulated output voltage with a varying input. Voltage equivalent of input current is averaged by using high gain current error amplifier, which again compared with the reference voltage. Reference voltage is produced by multiplying the rectified input voltage with the error output voltage. Gating pulse is generated by using this signal. This control method obtain better line and load regulation with the addition of inner current loop compared with voltage mode control. Also the rectified input voltage feedback achieves better input power factor. Conventional flyback rectifier is the inter connection of a diode bridge rectifier in the input side and a flyback converter. In order to obtain a highly efficient flyback rectifier with fewer losses an improved flyback rectifier is introduced. Here, two switches are connected in back to back to establish the bidirectional switch element, which will conduct both in the positive and negative half cycle of the ac input voltage. The transformer with dual output windings with a diode in each winding reduces the current stress across each diode. New topology adds an extra switch in the primary side and a diode in the secondary side. Improved bridgeless flyback rectifier only introduces a switch with common gate drive, a diode and an additional winding in the secondary side. Thus the weight of the converter is not affected with these additional components. Proposed average current mode control can be used as an adapter. Design and simulated waveforms are added in this paper for an output rating of 20V/1.5A.","PeriodicalId":6650,"journal":{"name":"2015 International Conference on Circuits, Power and Computing Technologies [ICCPCT-2015]","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2015-07-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86371219","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-07-16DOI: 10.1109/ICCPCT.2015.7159366
K. J. Francis, M. S. Godwin Premi
The paper presents MRI brain diagnosis support system for structure segmentation and its analysis using kernel weighted segmentation. The Proposed method has been used to segment normal tissues and abnormal tissue like tumor part of MR image automatically. MR images are often corrupted by Intensity in homogeneity and artifacts. This may affect the performance of image processing techniques used for brain image analysis. Due to this type of artifacts and noises unknowingly some normal tissue in MRI may be misclassified as other type of normal tissue and it leads to error during diagnosis process. The proposed system remove noise from the given images using a method called spectral subtraction de noising (SSD) and Kernel Weighted Fuzzy C Means (KWFCM) has been used for segmentation. This method incorporates spatial information and the membership weighting of every cluster has been altered after the cluster distribution in the neighborhood is considered. The paper results will be presented as segmented tissues with various parameter evaluations to show algorithm efficiency.
{"title":"Kernel weighted FCM based MR image segmentation for brain tumor detection","authors":"K. J. Francis, M. S. Godwin Premi","doi":"10.1109/ICCPCT.2015.7159366","DOIUrl":"https://doi.org/10.1109/ICCPCT.2015.7159366","url":null,"abstract":"The paper presents MRI brain diagnosis support system for structure segmentation and its analysis using kernel weighted segmentation. The Proposed method has been used to segment normal tissues and abnormal tissue like tumor part of MR image automatically. MR images are often corrupted by Intensity in homogeneity and artifacts. This may affect the performance of image processing techniques used for brain image analysis. Due to this type of artifacts and noises unknowingly some normal tissue in MRI may be misclassified as other type of normal tissue and it leads to error during diagnosis process. The proposed system remove noise from the given images using a method called spectral subtraction de noising (SSD) and Kernel Weighted Fuzzy C Means (KWFCM) has been used for segmentation. This method incorporates spatial information and the membership weighting of every cluster has been altered after the cluster distribution in the neighborhood is considered. The paper results will be presented as segmented tissues with various parameter evaluations to show algorithm efficiency.","PeriodicalId":6650,"journal":{"name":"2015 International Conference on Circuits, Power and Computing Technologies [ICCPCT-2015]","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2015-07-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85886485","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-07-16DOI: 10.1109/ICCPCT.2015.7159391
G. R. Jebaline, S. Gomathi
Nowadays we are using the pin number for security in ATMs, which replaced signature based system. The pin based security is the simplest level of security. The pin number is a unique number which is encrypted and decrypted during transaction. Nowadays the pin number can be extracted through many ways, for fraudulent activity. So, as a solution the pin number can be replaced with biometric security. The biometric security may be fingerprint, retina and so on. Nowadays, the system is used to compare the input image with the image in the database and if they are verified, the bank staff would disperse the cash. But the proposal model would completely replace the pin number with biometric system and the machine would disperse the cash when the comparison gets satisfied. Thus the security of the transaction is improved to a greater extent.
{"title":"A novel method to enhance the security of ATM using biometrics","authors":"G. R. Jebaline, S. Gomathi","doi":"10.1109/ICCPCT.2015.7159391","DOIUrl":"https://doi.org/10.1109/ICCPCT.2015.7159391","url":null,"abstract":"Nowadays we are using the pin number for security in ATMs, which replaced signature based system. The pin based security is the simplest level of security. The pin number is a unique number which is encrypted and decrypted during transaction. Nowadays the pin number can be extracted through many ways, for fraudulent activity. So, as a solution the pin number can be replaced with biometric security. The biometric security may be fingerprint, retina and so on. Nowadays, the system is used to compare the input image with the image in the database and if they are verified, the bank staff would disperse the cash. But the proposal model would completely replace the pin number with biometric system and the machine would disperse the cash when the comparison gets satisfied. Thus the security of the transaction is improved to a greater extent.","PeriodicalId":6650,"journal":{"name":"2015 International Conference on Circuits, Power and Computing Technologies [ICCPCT-2015]","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2015-07-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89833740","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-07-16DOI: 10.1109/ICCPCT.2015.7159417
S. Kunapareddy, Sriraj Dheeraj Turaga, Solomon Surya Tej Mano Sajjan
The importance of a Network On Chip (NoC) is increasing rapidly with the advent of System on Chip (SoC) design using Intellectual Property (IP). This is because it is hard to communicate with the IPs as they have different timing constrains and data rates. Energy usage of the on-chip interconnects is also a concern for many such SoCs targeting portable battery powered devices which necessitates design of an efficient NoC. This paper proposes an energy efficient simple asynchronous NOC design using 3-port T routers. The router has three pairs of switch and merge modules, connected in a T fashion.
{"title":"Design of asynchronous NoC using 3-port asynchronous T-routers","authors":"S. Kunapareddy, Sriraj Dheeraj Turaga, Solomon Surya Tej Mano Sajjan","doi":"10.1109/ICCPCT.2015.7159417","DOIUrl":"https://doi.org/10.1109/ICCPCT.2015.7159417","url":null,"abstract":"The importance of a Network On Chip (NoC) is increasing rapidly with the advent of System on Chip (SoC) design using Intellectual Property (IP). This is because it is hard to communicate with the IPs as they have different timing constrains and data rates. Energy usage of the on-chip interconnects is also a concern for many such SoCs targeting portable battery powered devices which necessitates design of an efficient NoC. This paper proposes an energy efficient simple asynchronous NOC design using 3-port T routers. The router has three pairs of switch and merge modules, connected in a T fashion.","PeriodicalId":6650,"journal":{"name":"2015 International Conference on Circuits, Power and Computing Technologies [ICCPCT-2015]","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2015-07-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78142068","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-07-16DOI: 10.1109/ICCPCT.2015.7159320
N. Das, P. Rasmi
In past several years so many steganalysis techniques are emerged but none of them are not efficient for real world image sharing applications where millions of images are transmitted. In small scale steganalysis individual images are detected for suspicious payload. Here uses a different approach to determine most prolific steganographer who sends large volume of secret data in the network. A new technique is introduced to determine the steganographer out of large number of users, where each user transmits numerous images. In this method steganalytic features are extracted from image, distance between users are calculated and finding out the outlier user who deviate from the majority of other users.
{"title":"Large-scale steganalysis using outlier detection method for image sharing application","authors":"N. Das, P. Rasmi","doi":"10.1109/ICCPCT.2015.7159320","DOIUrl":"https://doi.org/10.1109/ICCPCT.2015.7159320","url":null,"abstract":"In past several years so many steganalysis techniques are emerged but none of them are not efficient for real world image sharing applications where millions of images are transmitted. In small scale steganalysis individual images are detected for suspicious payload. Here uses a different approach to determine most prolific steganographer who sends large volume of secret data in the network. A new technique is introduced to determine the steganographer out of large number of users, where each user transmits numerous images. In this method steganalytic features are extracted from image, distance between users are calculated and finding out the outlier user who deviate from the majority of other users.","PeriodicalId":6650,"journal":{"name":"2015 International Conference on Circuits, Power and Computing Technologies [ICCPCT-2015]","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2015-07-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81671321","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-07-16DOI: 10.1109/ICCPCT.2015.7159345
Ganesan, Khamar Basha Shaik, B. Sathish, V. Kalist
Segmentation is the process of partitioning an image into number of meaningful images as segments or clusters. The segmentation is initial but important process which is used to locate boundaries and objects in images. This paper is concerned with segmentation of color satellite images using neural network based kohonen's self-organizing maps. This unsupervised competitive network is used to visualize and interpret large data sets. In this paper, test images are segmented in RGB and HSV color space using self-organizing map and the segmentation results are compared using error image, peak signal to noise ratio, and execution time. The efficiency of proposed method is tested with Landsat and Terra (MODIS sensor) satellite images.
{"title":"Neural network based SOM for multispectral image segmentation in RGB and HSV color space","authors":"Ganesan, Khamar Basha Shaik, B. Sathish, V. Kalist","doi":"10.1109/ICCPCT.2015.7159345","DOIUrl":"https://doi.org/10.1109/ICCPCT.2015.7159345","url":null,"abstract":"Segmentation is the process of partitioning an image into number of meaningful images as segments or clusters. The segmentation is initial but important process which is used to locate boundaries and objects in images. This paper is concerned with segmentation of color satellite images using neural network based kohonen's self-organizing maps. This unsupervised competitive network is used to visualize and interpret large data sets. In this paper, test images are segmented in RGB and HSV color space using self-organizing map and the segmentation results are compared using error image, peak signal to noise ratio, and execution time. The efficiency of proposed method is tested with Landsat and Terra (MODIS sensor) satellite images.","PeriodicalId":6650,"journal":{"name":"2015 International Conference on Circuits, Power and Computing Technologies [ICCPCT-2015]","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2015-07-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82024190","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-07-16DOI: 10.1109/ICCPCT.2015.7159429
Kunal Lohia, S. Garg, N. Shrivastava, B. K. Panigrahi
This paper presents a comparative study of various forecasting models for wind power. With the growing wind power usage in the power system, wind power forecasting is very much needed to help the power system in unit commitment, economic scheduling and reserve allocation problems. Wind power forecasting using autoregressive integrated moving average model, surface fitting model, neural networks, extreme learning machine and online sequential extreme learning machine is carried out in this paper. The performance characteristics of different forecasting models have been compared by applying different measure of errors such as bias, mean absolute error, root mean square error and standard deviation. The effectiveness of online sequential extreme learning machine is evaluated on the given wind power data and the results demonstrate that the online sequential extreme learning machine performance characteristic is better as compared with the other forecasting models.
{"title":"Comparative study of power forecasting methods for wind farms","authors":"Kunal Lohia, S. Garg, N. Shrivastava, B. K. Panigrahi","doi":"10.1109/ICCPCT.2015.7159429","DOIUrl":"https://doi.org/10.1109/ICCPCT.2015.7159429","url":null,"abstract":"This paper presents a comparative study of various forecasting models for wind power. With the growing wind power usage in the power system, wind power forecasting is very much needed to help the power system in unit commitment, economic scheduling and reserve allocation problems. Wind power forecasting using autoregressive integrated moving average model, surface fitting model, neural networks, extreme learning machine and online sequential extreme learning machine is carried out in this paper. The performance characteristics of different forecasting models have been compared by applying different measure of errors such as bias, mean absolute error, root mean square error and standard deviation. The effectiveness of online sequential extreme learning machine is evaluated on the given wind power data and the results demonstrate that the online sequential extreme learning machine performance characteristic is better as compared with the other forecasting models.","PeriodicalId":6650,"journal":{"name":"2015 International Conference on Circuits, Power and Computing Technologies [ICCPCT-2015]","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2015-07-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90795957","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-03-19DOI: 10.1109/ICCPCT.2015.7159390
S. Narang, A. Srivastava
The nanometre technology is different fundamentally from its predecessors as it is exposed to a wide variety of new effects that are induced on the transistor chips. NBTI is one degradation effects in the reliability regime. It plays significant role as it leads to severe performance degradation. Ageing in pMOS transistor takes place due to Negative bias temperature instability (NBTI) which is the major threat to reliability as we scale down the transistor geometries consistently towards our objective for less power consumption coupled with high performance. The work presented in this paper focuses on NBTI detection scheme for building tolerance with respect to NBTI effects employing Adaptive Body Bias (ABB). In this scheme, an On-Chip monitor detects the change in threshold voltage of the circuit to generate corresponding adaptive body bias by the body biasing circuit which is supplied to the transistors. The simulations have been carried out taking VBB as zero, i.e., No Body Bias (NBB), by applying a finite adaptive body bias (ABB) voltage to the transistors on the chip & their corresponding power and delay have thus been calculated by implementation of the proposed approach on a host of domino logic circuits which include Current comparison domino (CCD). We have mitigated the rise in delay problem by suitably allocating a supply voltage so that the delay specifications are continuously met even after a time span of 10 years of operation at the cost of very low power headroom. Simulations have been performed using the BSIM4v4.7 model & 32-nm predictive technology model in SILVACO EDA tool at a frequency of 2 GHz and nominal supply voltage of 0.9V. The proposed approach has been implemented on 32-bit & 64-bit OR gates and also on 32-bit comparator and the results has been noteworthy.
{"title":"NBTI detection methodology for building tolerance with respect to NBTI effects employing adaptive body bias","authors":"S. Narang, A. Srivastava","doi":"10.1109/ICCPCT.2015.7159390","DOIUrl":"https://doi.org/10.1109/ICCPCT.2015.7159390","url":null,"abstract":"The nanometre technology is different fundamentally from its predecessors as it is exposed to a wide variety of new effects that are induced on the transistor chips. NBTI is one degradation effects in the reliability regime. It plays significant role as it leads to severe performance degradation. Ageing in pMOS transistor takes place due to Negative bias temperature instability (NBTI) which is the major threat to reliability as we scale down the transistor geometries consistently towards our objective for less power consumption coupled with high performance. The work presented in this paper focuses on NBTI detection scheme for building tolerance with respect to NBTI effects employing Adaptive Body Bias (ABB). In this scheme, an On-Chip monitor detects the change in threshold voltage of the circuit to generate corresponding adaptive body bias by the body biasing circuit which is supplied to the transistors. The simulations have been carried out taking VBB as zero, i.e., No Body Bias (NBB), by applying a finite adaptive body bias (ABB) voltage to the transistors on the chip & their corresponding power and delay have thus been calculated by implementation of the proposed approach on a host of domino logic circuits which include Current comparison domino (CCD). We have mitigated the rise in delay problem by suitably allocating a supply voltage so that the delay specifications are continuously met even after a time span of 10 years of operation at the cost of very low power headroom. Simulations have been performed using the BSIM4v4.7 model & 32-nm predictive technology model in SILVACO EDA tool at a frequency of 2 GHz and nominal supply voltage of 0.9V. The proposed approach has been implemented on 32-bit & 64-bit OR gates and also on 32-bit comparator and the results has been noteworthy.","PeriodicalId":6650,"journal":{"name":"2015 International Conference on Circuits, Power and Computing Technologies [ICCPCT-2015]","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2015-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77813574","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-03-19DOI: 10.1109/ICCPCT.2015.7159428
K. Dharageshwari, C. Nayanatara
This paper presents the application of simulated annealing algorithm for the optimal placement of multiple distributed generations in IEEE 33 bus radial distribution system. In this paper multiobjective like power losses, and voltage profile improvement are considered. Expenditure of losses and savings are also estimated. Optimal placements are found using simulated annealing optimization technique. Voltage and Power Losses are calculated using Load flow analysis. Load flow analysis is done in IEEE 33 bus radial distributed network using Forward-Backward sweep method. Using Matlab software the performance of simulated annealing is illustrated. The feasibility of the proposed system is proved with Five Distributed Generations (DGs) which may be the combinations of Solar, Wind, Fuel cell, Geothermal, Biomass, reciprocating engines, and micro turbines. Using multiple DGs the improved results are discussed in this paper.
{"title":"Multiobjective optimal placement of multiple distributed generations in IEEE 33 bus radial system using simulated annealing","authors":"K. Dharageshwari, C. Nayanatara","doi":"10.1109/ICCPCT.2015.7159428","DOIUrl":"https://doi.org/10.1109/ICCPCT.2015.7159428","url":null,"abstract":"This paper presents the application of simulated annealing algorithm for the optimal placement of multiple distributed generations in IEEE 33 bus radial distribution system. In this paper multiobjective like power losses, and voltage profile improvement are considered. Expenditure of losses and savings are also estimated. Optimal placements are found using simulated annealing optimization technique. Voltage and Power Losses are calculated using Load flow analysis. Load flow analysis is done in IEEE 33 bus radial distributed network using Forward-Backward sweep method. Using Matlab software the performance of simulated annealing is illustrated. The feasibility of the proposed system is proved with Five Distributed Generations (DGs) which may be the combinations of Solar, Wind, Fuel cell, Geothermal, Biomass, reciprocating engines, and micro turbines. Using multiple DGs the improved results are discussed in this paper.","PeriodicalId":6650,"journal":{"name":"2015 International Conference on Circuits, Power and Computing Technologies [ICCPCT-2015]","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2015-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80066841","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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