Opportunities for ionic liquid/ionogel gating of emerging transistor architectures

Abstract

Ionic liquid/ionogel gate dielectrics can provide significant advantages for transistor architectures that utilize high surface area semiconductors and/or nonplanar substrates because of their cleanroom-free, liquid-based processability and their inherently large electrostatic double layer capacitance. These attributes of ionogels have already enabled the facile fabrication of several up-and-coming transistor devices geometries for which a highly conformal interface between the electrolyte gate dielectric and the semiconductor is readily achievable, and remote gating with a nonaligned gate electrode is possible. Further, ionogel gating can improve device performance to maximize current densities at low operating voltages. This Perspective highlights three classes of emerging transistor architectures, namely, vertical transistors, surround gate transistors, and thread/fiber-based transistors, and provides several key examples of instances where ionogel gating has either already enabled or still stands to improve device fabrication and performance.