Optimization of Convolutional Neural Networks on Resource Constrained Devices

Abstract

Implementation of convolutional neural networks (CNNs) on resource constrained devices like FPGA (example: Zynq) etc. is important for intelligence in edge computing. This paper presents and discusses different hardware optimization methods that were employed to design a CNN model that is amenable to such devices, in general. Adaptive processing, exploitation of parallelism etc. are employed to show the superior performance of proposed methods over state of the art.