Effect of UBM and BCB layers on the thermo-mechanical reliability of wafer level chip scale package (WLCSP)

Abstract

Cracking of the silicon chip of a wafer level chip scale package (WLCSP) is encountered during a thermal cycle test (TCT). This paper attempts to examine the failure mechanism. Both numerical and experimental efforts were devoted to investigate the problem. A series of finite element models with different combinations of material properties and geometric configurations were developed. The results showed that both the under bump metallization (UBM) and the dielectric layer Benzocyclobuten (BCB) contributed significantly to the stress level induced inside the silicon chip. In addition, solder ball pull tests were performed. The silicon cratering failure mode was reproduced which confirmed the failure mechanism as proposed by the finite element analysis. The effects of all relevant constituent materials on the chip are discussed in detail. Suggestions for the product design improvement are provided at the end of the paper.