{"title":"Experimental investigation and finite element analysis of bump wafer probing","authors":"H. Chang, W. Pan, M. Shih, Y. Lai","doi":"10.1109/IMPACT.2009.5382232","DOIUrl":null,"url":null,"abstract":"The purpose of this paper is to analyze the bump height variation and probe mark profile with various bump materials for wafer probing. It is necessary to establish different material bump wafer probing criteria, because the bump height variation and probe mark area have severe influence on the sort flip chip wafers that will affects the quality of the contact behavior and further impacts the flip chip assembly process reliability after wafer level probing. Standard bump wafer probing parameters can not only satisfy customer's various characters of devices, but is easy to control the appropriate bump height and probe mark quality to ensure assembly process reliability and to avoid the cold joint issue. In this paper, probing bump height and probe mark configuration with different bump materials were performed and the resultant probe marks from experiment were verified against the FE simulation results. A three-dimensional computational model was developed for analyze the contact phenomena of the solder bump and the probe. Finally, the standard bump wafer probing criteria were built by the experimental results and numerical methods. They can be used as the verified simulating model which is a useful performance evaluation tool to support the choice of suitable probe recipes and wafer probe parameters with more different bump dimensions and materials of wafer probing.","PeriodicalId":6410,"journal":{"name":"2009 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference","volume":"1 1","pages":"514-517"},"PeriodicalIF":0.0000,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMPACT.2009.5382232","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
The purpose of this paper is to analyze the bump height variation and probe mark profile with various bump materials for wafer probing. It is necessary to establish different material bump wafer probing criteria, because the bump height variation and probe mark area have severe influence on the sort flip chip wafers that will affects the quality of the contact behavior and further impacts the flip chip assembly process reliability after wafer level probing. Standard bump wafer probing parameters can not only satisfy customer's various characters of devices, but is easy to control the appropriate bump height and probe mark quality to ensure assembly process reliability and to avoid the cold joint issue. In this paper, probing bump height and probe mark configuration with different bump materials were performed and the resultant probe marks from experiment were verified against the FE simulation results. A three-dimensional computational model was developed for analyze the contact phenomena of the solder bump and the probe. Finally, the standard bump wafer probing criteria were built by the experimental results and numerical methods. They can be used as the verified simulating model which is a useful performance evaluation tool to support the choice of suitable probe recipes and wafer probe parameters with more different bump dimensions and materials of wafer probing.