Secure communications in wireless network-on-chips

Abstract

Wireless on-chip communication is an emerging technology that is currently being adopted in order to reduce latency and energy consumption of network transactions in many-core systems. The reason is that the multi-hop nature of conventional electrical network-on-chip has lead to the point of diminishing returns, which even aggravates as the number of hops increases to meet the ever-increasing core count in many-core systems. A Wireless NoC (WNoC) can be realized to broadcast network messages in a more efficient manner, so current research is exploring hybrid NoC designs composed of an electrical NoC and a WNoC to reach the desired performance improvement. Nonetheless, so far, nobody has addressed the problem of having network attacks when using a WNoC. In this work, we propose a security mechanism for a 64-core system with a hybrid NoC implementing ECONO cache coherence. Our experimental evaluation using multi-threaded applications from state-of-the-art benchmark suites reveals that the most lightweight technology designed to secure broadcast messages through hash-based functions can lead to more than 30% performance degradation. In addition, based on our study, we also propose tolerable latencies that must be achieved in future designs to guarantee truly lightweight secure WNoCs.