{"title":"MECRO: A local processing computer architecture based on memristor crossbar","authors":"Lei Xie, M. A. Haron","doi":"10.1145/2950067.2950099","DOIUrl":null,"url":null,"abstract":"As the need of data-intensive (or big data) applications is growing, the exascale system (i.e., capable of executing 1018 operations per second) is desired. However, it is challenging to scale von Neumann architecture to meet this need, due to its unavoidable data movement between processors and memories. To address such a challenge, this paper proposes a local-processing computer architecture (MECRO) based on memristor crossbar, which consists both microarchitecture and instruction set. Differing from von Neumann architecture, MECRO executes all operations locally in the memristor-based memory using stateful logic operations, where the same devices simultaneously serve as both logic and memory. In addition, this paper proposes a new multiplication arithmetic algorithm that is suitable for MECRO. n×n matrix multiplication is used as example of data-intensive applications. MECRO is verified with SPICE simulations in a small scale. Comparing with a von Neumann architecture consisting of p processors, the experiment shows that MECRO is able to improve the execution time in an order of O(n2/p), while using the similar memory (O(n3)).","PeriodicalId":6519,"journal":{"name":"2014 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH)","volume":"29 1","pages":"85-90"},"PeriodicalIF":0.0000,"publicationDate":"2016-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/2950067.2950099","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
As the need of data-intensive (or big data) applications is growing, the exascale system (i.e., capable of executing 1018 operations per second) is desired. However, it is challenging to scale von Neumann architecture to meet this need, due to its unavoidable data movement between processors and memories. To address such a challenge, this paper proposes a local-processing computer architecture (MECRO) based on memristor crossbar, which consists both microarchitecture and instruction set. Differing from von Neumann architecture, MECRO executes all operations locally in the memristor-based memory using stateful logic operations, where the same devices simultaneously serve as both logic and memory. In addition, this paper proposes a new multiplication arithmetic algorithm that is suitable for MECRO. n×n matrix multiplication is used as example of data-intensive applications. MECRO is verified with SPICE simulations in a small scale. Comparing with a von Neumann architecture consisting of p processors, the experiment shows that MECRO is able to improve the execution time in an order of O(n2/p), while using the similar memory (O(n3)).