MECRO: A local processing computer architecture based on memristor crossbar

Lei Xie, M. A. Haron
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Abstract

As the need of data-intensive (or big data) applications is growing, the exascale system (i.e., capable of executing 1018 operations per second) is desired. However, it is challenging to scale von Neumann architecture to meet this need, due to its unavoidable data movement between processors and memories. To address such a challenge, this paper proposes a local-processing computer architecture (MECRO) based on memristor crossbar, which consists both microarchitecture and instruction set. Differing from von Neumann architecture, MECRO executes all operations locally in the memristor-based memory using stateful logic operations, where the same devices simultaneously serve as both logic and memory. In addition, this paper proposes a new multiplication arithmetic algorithm that is suitable for MECRO. n×n matrix multiplication is used as example of data-intensive applications. MECRO is verified with SPICE simulations in a small scale. Comparing with a von Neumann architecture consisting of p processors, the experiment shows that MECRO is able to improve the execution time in an order of O(n2/p), while using the similar memory (O(n3)).
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一种基于忆阻交叉棒的本地处理计算机体系结构
随着数据密集型(或大数据)应用程序的需求不断增长,需要exascale系统(即能够每秒执行1018次操作)。然而,由于其在处理器和存储器之间不可避免的数据移动,扩展冯诺伊曼架构以满足这一需求是具有挑战性的。为了解决这一难题,本文提出了一种基于忆阻交叉棒的本地处理计算机体系结构(MECRO),该体系结构由微体系结构和指令集两部分组成。与冯·诺伊曼架构不同,MECRO使用有状态逻辑操作在基于忆阻器的内存中本地执行所有操作,其中相同的设备同时充当逻辑和内存。此外,本文还提出了一种新的适用于MECRO的乘法算法。N×n矩阵乘法被用作数据密集型应用程序的示例。MECRO在小范围内通过SPICE模拟进行了验证。与由p个处理器组成的von Neumann架构相比,实验表明,在使用相同内存(O(n3))的情况下,MECRO能够将执行时间提高O(n2/p)数量级。
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