Electrical performance improvement in SiO/sub 2//HfSiO high-k gate stack for advanced low power device application

Abstract

A study on the impacts of varying base oxide thickness, Si composition and nitridation on HfSiO to the overall high-k gate stack performance was carried out in detail. Increasing base oxide thickness from 8A to 12A was found to reduce susceptibility of charge trapping within HfSiO layer and improve drive current. Also, increasing Si composition in HfSiO layer from 50% to 75% produced a higher drive current. However, this improvement was achieved at the expense of a higher gate leakage current. The HfSiO, when subjected to N/sub 2/ plasma, forms HfSiON that exhibits excellent high-k dielectric properties with low EOT, low leakage current: and high driving current. With complete understanding on the contribution from each layer, a good high-k gate stack, based on HfSiON was fabricated. Leakage current was successfully reduced to three orders lower than the conventional SiO/sub 2/.