Flexible in-silicon checking of run-time programmable assertions

Abstract

Recently, Assertion-Based Verification (ABV) has been significantly improved and used not only in academia but also in industry. In this paper, we present a new assertion checking approach that dynamically interprets a software-defined assertion checker during run-time. In contrast to the state-of-the-art hardware checker, the presented method compiles its checker to instructions, which can be changed flexibly by software in the in-silicon phase. A stand-alone hardware block, called assertion processing unit (APU), is used for implementing the compiled instructions. This unit handles the storage of the checker code, the execution of the checking, and the feedback of checked results in the system run-time environment. We have successfully evaluated this approach on an FPGA-based prototyping board, showing measurable benefits of this approach.