Analysis of BTI aging of level shifters

Abstract

This paper provides a comprehensive evaluation of the effects of Bias Temperature Instability (BTI) aging on the delay of level shifters. The latter are indispensable blocks in energy efficient systems with multiple supply voltages. Our results show that conventional level-up shifters exhibit significantly more aging-induced delay degradation compared to standard logic cells. Our experiments performed in a predictive 32nm technology indicate those designs can suffer from more than 200% increase in their delay after 5 years due to BTI aging compared to an average of 20% delay rise in the case of standard CMOS logic. Our investigations show that the reason behind this phenomenon is the differential signaling structure present in the majority of conventional level up shifters, combined with the use of low supply voltages.