Formal analysis of SEU mitigation for early dependability and performability analysis of FPGA-based space applications

Q1 Mathematics Journal of Applied Logic Pub Date : 2017-12-01 DOI:10.1016/j.jal.2017.03.001
Khaza Anuarul Hoque , Otmane Ait Mohamed , Yvon Savaria
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引用次数: 15

Abstract

SRAM-based FPGAs are increasingly popular in the aerospace industry due to their field programmability and low cost. However, they suffer from cosmic radiation induced Single Event Upsets (SEUs). In safety-critical applications, the dependability of the design is a prime concern since failures may have catastrophic consequences. An early analysis of the relationship between dependability metrics, performability-area trade-off, and different mitigation techniques for such applications can reduce the design effort while increasing the design confidence. This paper introduces a novel methodology based on probabilistic model checking, for the analysis of the reliability, availability, safety and performance-area tradeoffs of safety-critical systems for early design decisions. Starting from the high-level description of a system, a Markov reward model is constructed from the Control Data Flow Graph (CDFG) and a component characterization library targeting FPGAs. The proposed model and exhaustive analysis capture all the failure states (based on the fault detection coverage) and repairs possible in the system. We present quantitative results based on an FIR filter circuit to illustrate the applicability of the proposed approach and to demonstrate that a wide range of useful dependability and performability properties can be analyzed using the proposed methodology. The modeling results show the relationship between different mitigation techniques and fault detection coverage, exposing their direct impact on the design for early decisions.

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基于fpga的空间应用的早期可靠性和性能分析中SEU缓解的形式化分析
基于sram的fpga由于其现场可编程性和低成本在航空航天工业中越来越受欢迎。然而,它们遭受宇宙辐射引起的单事件扰动(SEUs)。在安全关键型应用中,设计的可靠性是首要考虑的问题,因为故障可能会造成灾难性的后果。早期分析可靠性度量、性能区域权衡以及此类应用程序的不同缓解技术之间的关系,可以在增加设计信心的同时减少设计工作量。本文介绍了一种基于概率模型检验的新方法,用于分析早期设计决策中安全关键系统的可靠性、可用性、安全性和性能区域权衡。从系统的高层描述出发,利用控制数据流图(CDFG)和针对fpga的组件表征库构建了马尔可夫奖励模型。所提出的模型和详尽分析捕获了系统中所有的故障状态(基于故障检测覆盖率)和可能的修复。我们给出了基于FIR滤波器电路的定量结果,以说明所提出方法的适用性,并证明使用所提出的方法可以分析广泛的有用的可靠性和可执行性特性。建模结果显示了不同缓解技术与故障检测覆盖率之间的关系,揭示了它们对早期决策设计的直接影响。
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来源期刊
Journal of Applied Logic
Journal of Applied Logic COMPUTER SCIENCE, ARTIFICIAL INTELLIGENCE-COMPUTER SCIENCE, THEORY & METHODS
CiteScore
1.13
自引率
0.00%
发文量
0
审稿时长
>12 weeks
期刊介绍: Cessation.
期刊最新文献
Editorial Board Editorial Board Formal analysis of SEU mitigation for early dependability and performability analysis of FPGA-based space applications Logical Investigations on Assertion and Denial Natural deduction for bi-intuitionistic logic
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