Extracting power supply current profile by using interposer-based low-noise probing technique for PDN design of high-density POP

Abstract

Firmly understanding the power supply current profile (PSCP) of various scenarios used in real use cases is essential for the simulation and design of power delivery network (PDN) of system-on-chip (SOC) to maximize processor’s performance within limited cost budget for die, package, and system, because the low power hard-ware implementation of leading-edge SOC including high performance computing cores for video data processing, 3D graphics, augmented reality, artificial intelligence, and 5G data communication with battery powered portable electronic devices, whose primary concern is the low power consumption, has been concentrated on reducing the minimum allowable power supply voltage for high performance computing cores including CPU, GPU, NPU and CP. The objective of this work is presenting the method to precisely probe power supply voltage fluctuation (PSVF) of whole power domains for power supply current profile (PSCP) extraction of entire cores, for which the authors present an concrete analysis methodology, based on which a test interposer scheme targeted for probing core logic blocks at the proper position of PDN is implemented and demonstrated when in operation. The proposed low noise probing system for acquiring PSCP is constructed by a test interposer designed with rigorous PI analyses.