Design of a Safe Convolutional Neural Network Accelerator

2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) Pub Date : 2019-07-15 DOI:10.1109/ISVLSI.2019.00053

Zheng Xu, J. Abraham

引用次数: 1

Abstract

Recently Machine Learning (ML) accelerators have grown into prominence with significant power and performance efficiency improvements over CPU and GPU. In this paper, we developed an Algorithm Based Error Checker (ABEC) for Concurrent Error Detection (CED) based on an industry quality Convolution Neural Network (CNN) accelerator with priority to meet high safety Diagnostic Coverage (DC) requirement and enhanced area and power efficiency. Furthermore, we developed an Algorithm Based Cluster Checker (ABCC) with coarse-grained error localization to improve run-time availability. Experimental results showed that we could achieve above 99% DC with only 30% area and power overhead for a selected configuration.

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一种安全卷积神经网络加速器的设计

最近，机器学习(ML)加速器变得越来越突出，与CPU和GPU相比，它的功率和性能效率都有了显著提高。本文基于卷积神经网络(CNN)加速器，开发了一种基于算法的并发错误检测(CED)错误检查器(ABEC)，以满足高安全诊断覆盖率(DC)要求，并提高了面积和功率效率。此外，我们开发了一个基于算法的集群检查器(ABCC)，具有粗粒度的错误定位，以提高运行时的可用性。实验结果表明，对于选定的配置，我们可以在只有30%的面积和功率开销的情况下实现99%以上的直流。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)

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