An ultra low power encoder for 5 bit flash ADC

Y. Lavania, G. Varghese, K. Mahapatra
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引用次数: 9

Abstract

This investigation suggests a low power encoding scheme proposed for 4GS/s 5 bit flash analog to digital converter. One of the demanding issues in the design of a low power flash ADC is the design of thermometer code to binary code. An encoder in this paper converts the thermometer code into binary code without any intermediate stage. To decrease the power consumption of the encoder, the implementation is done using dynamic CMOS logic. The proposed encoder is designed using 90 nm technology at 1.2 V power supply using CADENCE tool. The simulation results shown for a sampling frequency of 4GHz and the average power dissipation of the encoder is 1.833 μW.
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一个超低功耗编码器,用于5位闪存ADC
本文提出了一种低功耗的4GS/s 5位闪存模数转换器编码方案。在低功耗闪存ADC的设计中,将温度计编码转换为二进制编码是一个要求很高的问题。本文设计了一种编码器,该编码器可将温度计编码直接转换为二进制编码,无需任何中间步骤。为了降低编码器的功耗,采用动态CMOS逻辑实现。该编码器采用90nm技术,采用CADENCE工具在1.2 V电源下设计。仿真结果表明,当采样频率为4GHz时,编码器的平均功耗为1.833 μW。
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