R. V. Roijen, M. Lucksinger, M. Fields, R. Baiocco, M. Oh, Derek Stoll
{"title":"Uniformity and Yield Optimization for a highly diverse Product Mix : Topic: YE","authors":"R. V. Roijen, M. Lucksinger, M. Fields, R. Baiocco, M. Oh, Derek Stoll","doi":"10.1109/ASMC49169.2020.9185400","DOIUrl":null,"url":null,"abstract":"Recent developments in the Semiconductor industry are moving away from the trend of transition to the next technology node, instead diversifying to address different markets. We discuss some implications of a change, which in our case involves a transition in chip size. Even when the node remains the same, changing the chip size affects process as well as process control and productivity. We discuss the effects of the introduction of products with a small chip size in a production line optimized for large Logic chips. We also describe specific changes made to optimize our Lithography, Reactive Ion Etching (RIE) and Chemical-Mechanical Polishing (CMP) process for small chips.","PeriodicalId":6771,"journal":{"name":"2020 31st Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC)","volume":"40 1","pages":"1-5"},"PeriodicalIF":0.0000,"publicationDate":"2020-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 31st Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASMC49169.2020.9185400","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Recent developments in the Semiconductor industry are moving away from the trend of transition to the next technology node, instead diversifying to address different markets. We discuss some implications of a change, which in our case involves a transition in chip size. Even when the node remains the same, changing the chip size affects process as well as process control and productivity. We discuss the effects of the introduction of products with a small chip size in a production line optimized for large Logic chips. We also describe specific changes made to optimize our Lithography, Reactive Ion Etching (RIE) and Chemical-Mechanical Polishing (CMP) process for small chips.