Programmable Gain and Bandwidth Op-Amp Using Controllable Input Stage Tail Current

Muhaned Zaidi, I. Grout, Abu Khari A'ain
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引用次数: 2

Abstract

This paper presents a novel technique to design a programmable open-loop DC gain and bandwidth single-ended output CMOS (complementary metal oxide semiconductor) opamp (operational amplifier) using a serial digital interface. The circuit topology allows for the programming of the differential input stage tail current. With this variable tail current, a controllable open-loop DC gain and frequency response is created that can be controlled from a host digital processor. The op-amp circuit has a rail-to-rail output where the first stage of the op-amp consists of differential input and folded-cascode circuits that are compensated using a negative Miller capacitor, and the second stage is a class-AB amplifier compensated by a conventional Miller capacitor. The op-amp has been designed using a $0.35\ \mu \mathrm{m}$ CMOS technology, its operation simulated using the Cadence Spectre simulator and operates on a single-rail +3.3V power supply.
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使用可控输入级尾电流的可编程增益和带宽运放
本文提出了一种利用串行数字接口设计可编程开环直流增益和带宽单端输出CMOS运放的新技术。电路拓扑结构允许对差分输入级尾电流进行编程。有了这个可变尾电流,一个可控的开环直流增益和频率响应被创建,可以从主机数字处理器控制。运放电路具有轨对轨输出,其中运放的第一级由差分输入和折叠级联电路组成,使用负米勒电容进行补偿,第二级是由传统米勒电容进行补偿的ab类放大器。该运放采用0.35\ \mu \ maththrm {m}$ CMOS技术设计,其运行使用Cadence Spectre模拟器进行模拟,并在单轨+3.3V电源上运行。
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