Ultra-Thin Wafer-Level Chip Scale Packaging

Abstract

IC packages are getting thinner to facilitate thinner electronics products. Labels and tags are getting smarter. Electronics are starting to bend, and reliability is in question. Semiconductor-on-Polymer™ (SoP) Chip Scale Packaging (CSP) is enabling ultra-thin flexible hybrid electronics and sensors today. This presentation shares the development, of SoP application to flexible hybrid electronics (FHE), and where SoP fits in IC packaging technologies. SoP CSP facilitates more functionality for hybrid approaches with printed electronics by allowing seamless integration of thin die into flexible/printed electronics with high reliability. Reliable thin die are an enabler for thinner conventional IC packages and potentially for thinner embedded packages (both FO and substrate based). The presentation also shows the technology roadmap for SoP application to IC packaging.