Reliable and energy-efficient 1MHz 0.4V dynamically reconfigurable SoC for ExG applications in 40nm LP CMOS

M. Konijnenburg, Yeon-Gon Cho, M. Ashouei, T. Gemmeke, Changmoo Kim, J. Hulzink, J. Stuyt, Mookyung Jung, J. Huisken, Soojung Ryu, Jungwook Kim, H. D. Groot
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引用次数: 30

Abstract

Wireless Sensor Nodes (WSN) have a wide range of applications in health care and life style monitoring. Their severe energy constraint is often addressed through minimizing the amount of transmitted data by way of energy-efficient on-node signal processing. The rationale for this approach is that a large portion of WSN energy is consumed by the radio communication even for very low-data-rate situations [1]. Efficient on-node processing has been the subject of recent work, with the common element being aggressive voltage scaling into the sub-threshold region [2-4]. A major assumption of the existing works is that the amount of required computation is low, justifying an on-node processor with limited computational capability. While this might be the case for many applications of WSNs, emerging ambulatory biomedical signal processing applications exceed the performance offered by today's on-node processors.
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可靠和节能的1MHz 0.4V动态可重构SoC,适用于40nm LP CMOS的ExG应用
无线传感器节点(WSN)在医疗保健和生活方式监测方面有着广泛的应用。它们严重的能量限制通常通过通过节能型节点上信号处理最小化传输数据量来解决。这种方法的基本原理是,即使在非常低的数据速率情况下,无线传感器网络的大部分能量也被无线电通信所消耗[1]。高效的节点上处理一直是最近工作的主题,共同的元素是积极的电压缩放到亚阈值区域[2-4]。现有工作的一个主要假设是所需的计算量很低,证明了计算能力有限的节点上处理器的合理性。虽然这可能是wsn的许多应用的情况,但新兴的动态生物医学信号处理应用超过了今天的节点处理器所提供的性能。
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