Improved Standby Leakage of Huge Volume SRAM by Thin SIN Film of STI Liner

Abstract

P+ to Pwell and N+ to Nwell leakage are the most basic leakage components in VLSI circuit and had been received many technologies to be reduced. In each technology, trade off must be made to keep low P+ to Pwell or N+ to Nwell leakage while do not degrade the other characteristic of the circuit. We found that a thin SIN layer post STI Liner OX was able to reduce the B project range at the interface of Active and STI OX, hence reduce P+ to Pwell leakage in Ultro Low Leakage Huge Volume SRAM. As a result, increased P+ diffusion resistance caused by reducing P+ implant energy can be avoided.