On the influence of compiler optimizations in the fault tolerance of embedded systems

A. Serrano-Cases, José Isaza-González, S. Cuenca-Asensi, A. Martínez-Álvarez
{"title":"On the influence of compiler optimizations in the fault tolerance of embedded systems","authors":"A. Serrano-Cases, José Isaza-González, S. Cuenca-Asensi, A. Martínez-Álvarez","doi":"10.1109/IOLTS.2016.7604701","DOIUrl":null,"url":null,"abstract":"This paper proposes a method for tuning compilations to improve the size, execution time and reliability of the final application altogether. Our approach implements a genetic strategy with a multi-objective evolution that takes advantage of the NSGA-II algorithm for selecting the best compilations. Experiments show that reliability can be improved by efficiently exploring the compiler optimization options. As a consequence, our method enhances the application fault coverage from 3% to 6% and gets increments of MWTF from 15% to 45%.","PeriodicalId":6580,"journal":{"name":"2016 IEEE 22nd International Symposium on On-Line Testing and Robust System Design (IOLTS)","volume":"9 1 1","pages":"207-208"},"PeriodicalIF":0.0000,"publicationDate":"2016-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE 22nd International Symposium on On-Line Testing and Robust System Design (IOLTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IOLTS.2016.7604701","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9

Abstract

This paper proposes a method for tuning compilations to improve the size, execution time and reliability of the final application altogether. Our approach implements a genetic strategy with a multi-objective evolution that takes advantage of the NSGA-II algorithm for selecting the best compilations. Experiments show that reliability can be improved by efficiently exploring the compiler optimization options. As a consequence, our method enhances the application fault coverage from 3% to 6% and gets increments of MWTF from 15% to 45%.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
编译器优化对嵌入式系统容错性能的影响
本文提出了一种优化编译的方法,以改善最终应用程序的大小、执行时间和可靠性。我们的方法实现了一种多目标进化的遗传策略,利用NSGA-II算法来选择最佳编译。实验表明,通过有效地探索编译器优化选项,可以提高可靠性。因此,我们的方法将应用程序的故障覆盖率从3%提高到6%,并将MWTF从15%增加到45%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Keytone: Silent Data Corruptions at Scale Welcome Field profiling & monitoring of payload transistors in FPGAs Statistical analysis and comparison of 2T and 3T1D e-DRAM minimum energy operation NBTI aging evaluation of PUF-based differential architectures
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1