A Simple Current Test Method on Wafer Level to Pre-Verify Circuit Function

Abstract

In this paper, a wafer level current testing method is presented. The proposed method gives a pre-testing on wafer level before packaging test. By a simple current testing, which can shorten the period of the process development and verification. Detailed procedure and advantages of the WAT test algorithm are given. the method is detecting the static current of the output signal (IBIAS module), which can check whether the function can be acted. Also the same data can be used for predicting the characteristics of dynamic power circuit.