Investigation of Trap Induced Gate Lag Phenomenon in AlGaN/GaN High Electron Mobility Transistors

Abstract

The gate-lag phenomenon in AlGaN/GaN High Electron Mobility Transistors (HEMTs) is analyzed using two-dimensional TCAD simulation. Drain current (ID) transient method is used to analyze the consequence of gate lag. Effect of donor states present at AlGaN surface and acceptor type traps in bulk GaN is investigated in detail. It was found that the contributions of both donor and acceptor type traps should be taken into consideration for obtaining the simulated ID transient similar to the experimental results. Effects of energy level and concentration of traps, and applied OFF-state bias stresses on the gate lag phenomenon in AlGaN/GaN HEMTs are also investigated. This paper also provides a detailed explanation of gate lag transient characteristics for over 10 decades of time.