Jeongho Hwang, Hong-Seok Choi, H. Do, Gyu-Seob Jeong, Daehyun Koh, Kwanseo Park, Sungwoo Kim, D. Jeong
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引用次数: 6
Abstract
This paper presents a 64Gb/s, 2.29pJ/b PAM-4 optical transmitter (TX) utilizing a VCSEL. To improve the power efficiency, the TX adopts a quarter-rate architecture consisting of a quadrature clock generator and a 4:1 MUX. By employing an asymmetric push-pull FFE, high-speed PAM-4 signaling based on a VCSEL can be achieved. It is fabricated in a 65nm CMOS technology, occupying an active area of 0.278mm2.
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