Energy-Efficient Embedded Inference of SVMs on FPGA

Abstract

We propose an energy-efficient embedded binarized Support Vector Machine (eBSVM) architecture and present its implementation on low-power FPGA accelerator. With binarized input activations and output weights, the dot product operation (float-point multiplications and additions) can be replaced by bitwise XNOR and popcount operations, respectively. The proposed accelerator computes the two binarized vectors using hamming weights, resulting in reduced execution time and energy consumption. Evaluation results show that eBSVM demonstrates performance and performance-per-Watt on MNIST and CIFAR-10 datasets compared to its fixed point (FP) counterpart implemented in CPU and GPU with small accuracy degradation.