Design and Simulation of a Low Power 384-channel Actively Multiplexed Neural Interface.

Abstract

Brain computer interfaces (BCIs) provide clinical benefits including partial restoration of lost motor control, vision, speech, and hearing. A fundamental limitation of existing BCIs is their inability to span several areas (> cm²) of the cortex with fine (<100 μm) resolution. One challenge of scaling neural interfaces is output wiring and connector sizes as each channel must be independently routed out of the brain. Time division multiplexing (TDM) overcomes this by enabling several channels to share the same output wire at the cost of added noise. This work leverages a 130-nm CMOS process and transfer printing to design and simulate a 384-channel actively multiplexed array, which minimizes noise by adding front end filtering and amplification to every electrode site (pixel). The pixels are 50 μm × 50 μm and enable recording of all 384 channels at 30 kHz with a gain of 22.3 dB, noise of 9.57 μV rms, bandwidth of 0.1 Hz - 10 kHz, while only consuming 0.63 μW/channel. This work can be applied broadly across neural interfaces to create high channel-count arrays and ultimately improve BCIs.