用于大动态范围高带宽模拟电路的CMOS负电源

Xiong Liu, A. Willson
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引用次数: 4

摘要

为了解决大型满量程亚量程ADC参考阶梯中电流源输出阻抗下降的问题,提出了一种0.18µm CMOS中占地0.028 mm2的反馈闭环负电源系统。该系统可用于克服其他高性能大动态范围模拟电路中的净空问题,如大输入摆幅连续时间滤波器、模拟放大器、缓冲器和模拟精密控制回路。该架构具有超过40%的功率效率内核和一个小型片上16pf MOS电容器,提供了功率和面积效率的解决方案。支持高达400µa的电流,系统产生−0.7 V输出,纹波小于5 mv,可以很容易地通过线性稳压器抑制超过40 dB。
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A CMOS negative supply for large dynamic range high-bandwidth analog circuits
To address the problem of current source output impedance degradation in a large full-scale sub-ranging ADC's reference ladder, a feedback closed-loop negative supply system, occupying 0.028 mm2 in 0.18-µm CMOS, is proposed. This system can be applied to overcome headroom issues in other high-performance large-dynamic-range analog circuits such as large input swing continuous-time filters, analog amplifiers, buffers and analog precision control loops. With a more than 40% power efficient core and a small on-chip 16-pF MOS capacitor, this architecture provides a power and area efficient solution. Supporting up to a 400-µA current, the system generates a −0.7 V output with less than 5-mV ripple, which can easily be suppressed by more than 40 dB by a linear regulator.
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