Nan Qi, B. Chi, Yang Xu, Zhou Chen, Yang Xu, Jun Xie, Zheng Song, Zhihua Wang
{"title":"用于GNSS互操作的180nm全集成双通道可重构接收机","authors":"Nan Qi, B. Chi, Yang Xu, Zhou Chen, Yang Xu, Jun Xie, Zheng Song, Zhihua Wang","doi":"10.1109/ESSCIRC.2013.6649101","DOIUrl":null,"url":null,"abstract":"A fully-integrated dual-channel reconfigurable GNSS (GPS/GLONASS/Galileo/Compass) receiver in 180nm CMOS is presented, supporting simultaneous dual-system signal reception. Two channels of the receiver share RF front-end circuits and the frequency synthesizer, and employ separate IF-strips to support the different navigation systems. Reconfigurable signal bandwidths are supported, covering from 2.2MHz to 10MHz to implement both civil and high precision positioning. The on-chip I/Q mismatch calibration circuit is integrated to improve the image rejection ratio (IRR), which can be realized automatically with the aid of a FPGA. Besides, the receiver integrates internal AFC, DCOC, LDO and DCXO, which make it a complete GNSS radio. Thanks to the power scalable analog baseband circuits, the power consumption in the typical dual-channel mode is reduced to 23mA. The receiver achieves 2.5dB noise figure, 55dB dynamic range with 1dB steps, 50dB IRR and -57dBm input 1dB-compression point. The receiver can cooperate with a digital baseband to track real-time satellites in the open sky, achieving higher than 40dB CNR for both GPS and Compass systems.","PeriodicalId":183620,"journal":{"name":"2013 Proceedings of the ESSCIRC (ESSCIRC)","volume":"153 1‐3","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"A 180nm fully-integrated dual-channel reconfigurable receiver for GNSS interoperations\",\"authors\":\"Nan Qi, B. Chi, Yang Xu, Zhou Chen, Yang Xu, Jun Xie, Zheng Song, Zhihua Wang\",\"doi\":\"10.1109/ESSCIRC.2013.6649101\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A fully-integrated dual-channel reconfigurable GNSS (GPS/GLONASS/Galileo/Compass) receiver in 180nm CMOS is presented, supporting simultaneous dual-system signal reception. Two channels of the receiver share RF front-end circuits and the frequency synthesizer, and employ separate IF-strips to support the different navigation systems. Reconfigurable signal bandwidths are supported, covering from 2.2MHz to 10MHz to implement both civil and high precision positioning. The on-chip I/Q mismatch calibration circuit is integrated to improve the image rejection ratio (IRR), which can be realized automatically with the aid of a FPGA. Besides, the receiver integrates internal AFC, DCOC, LDO and DCXO, which make it a complete GNSS radio. Thanks to the power scalable analog baseband circuits, the power consumption in the typical dual-channel mode is reduced to 23mA. The receiver achieves 2.5dB noise figure, 55dB dynamic range with 1dB steps, 50dB IRR and -57dBm input 1dB-compression point. The receiver can cooperate with a digital baseband to track real-time satellites in the open sky, achieving higher than 40dB CNR for both GPS and Compass systems.\",\"PeriodicalId\":183620,\"journal\":{\"name\":\"2013 Proceedings of the ESSCIRC (ESSCIRC)\",\"volume\":\"153 1‐3\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-10-31\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 Proceedings of the ESSCIRC (ESSCIRC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.2013.6649101\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 Proceedings of the ESSCIRC (ESSCIRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2013.6649101","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 180nm fully-integrated dual-channel reconfigurable receiver for GNSS interoperations
A fully-integrated dual-channel reconfigurable GNSS (GPS/GLONASS/Galileo/Compass) receiver in 180nm CMOS is presented, supporting simultaneous dual-system signal reception. Two channels of the receiver share RF front-end circuits and the frequency synthesizer, and employ separate IF-strips to support the different navigation systems. Reconfigurable signal bandwidths are supported, covering from 2.2MHz to 10MHz to implement both civil and high precision positioning. The on-chip I/Q mismatch calibration circuit is integrated to improve the image rejection ratio (IRR), which can be realized automatically with the aid of a FPGA. Besides, the receiver integrates internal AFC, DCOC, LDO and DCXO, which make it a complete GNSS radio. Thanks to the power scalable analog baseband circuits, the power consumption in the typical dual-channel mode is reduced to 23mA. The receiver achieves 2.5dB noise figure, 55dB dynamic range with 1dB steps, 50dB IRR and -57dBm input 1dB-compression point. The receiver can cooperate with a digital baseband to track real-time satellites in the open sky, achieving higher than 40dB CNR for both GPS and Compass systems.