M. Spasova, T. Brusev, G. Angelov, R. Radonov, M. Hristov
{"title":"低功率斜坡发电机与MOSFET和CNTFET晶体管","authors":"M. Spasova, T. Brusev, G. Angelov, R. Radonov, M. Hristov","doi":"10.1109/ET.2019.8878567","DOIUrl":null,"url":null,"abstract":"In this paper we compare low power ramp generator schematics realized with conventional MOSFET transistors and CNTFET transistors. The current consumption and power losses of the both circuits are evaluated and analyzed. The generator circuit is part of an overall buck dc-dc converter system, which uses a PWM control technique. The investigation is performed in Cadence Spectre circuit simulator using the 0.35 µm CMOS technology design kit.","PeriodicalId":306452,"journal":{"name":"2019 IEEE XXVIII International Scientific Conference Electronics (ET)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Low Power Ramp Generator with MOSFET and CNTFET Transistors\",\"authors\":\"M. Spasova, T. Brusev, G. Angelov, R. Radonov, M. Hristov\",\"doi\":\"10.1109/ET.2019.8878567\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper we compare low power ramp generator schematics realized with conventional MOSFET transistors and CNTFET transistors. The current consumption and power losses of the both circuits are evaluated and analyzed. The generator circuit is part of an overall buck dc-dc converter system, which uses a PWM control technique. The investigation is performed in Cadence Spectre circuit simulator using the 0.35 µm CMOS technology design kit.\",\"PeriodicalId\":306452,\"journal\":{\"name\":\"2019 IEEE XXVIII International Scientific Conference Electronics (ET)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 IEEE XXVIII International Scientific Conference Electronics (ET)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ET.2019.8878567\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE XXVIII International Scientific Conference Electronics (ET)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ET.2019.8878567","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Low Power Ramp Generator with MOSFET and CNTFET Transistors
In this paper we compare low power ramp generator schematics realized with conventional MOSFET transistors and CNTFET transistors. The current consumption and power losses of the both circuits are evaluated and analyzed. The generator circuit is part of an overall buck dc-dc converter system, which uses a PWM control technique. The investigation is performed in Cadence Spectre circuit simulator using the 0.35 µm CMOS technology design kit.
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