片上容错网络的功率和面积评估

Thawra Kadeed, Eberle A. Rambo, R. Ernst
{"title":"片上容错网络的功率和面积评估","authors":"Thawra Kadeed, Eberle A. Rambo, R. Ernst","doi":"10.1109/SOCC.2017.8226034","DOIUrl":null,"url":null,"abstract":"As fault-tolerant Networks-on-Chip (NoCs) become prevalent in reliable systems, their overhead must be accurately evaluated. In this paper, we evaluate the overhead of a soft error resilient real-time NoC router for ASICs in terms of area and power. We employ a power analysis framework and load profiles that provide accurate power figures. Furthermore, we analyze the power behavior in normal operation as well as under errors. Experiments show that the employed error detection and retransmission schemes in our NoC contribute low power overhead when compared to previously proposed scheme.","PeriodicalId":366264,"journal":{"name":"2017 30th IEEE International System-on-Chip Conference (SOCC)","volume":"68 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Power and area evaluation of a fault-tolerant network-on-chip\",\"authors\":\"Thawra Kadeed, Eberle A. Rambo, R. Ernst\",\"doi\":\"10.1109/SOCC.2017.8226034\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"As fault-tolerant Networks-on-Chip (NoCs) become prevalent in reliable systems, their overhead must be accurately evaluated. In this paper, we evaluate the overhead of a soft error resilient real-time NoC router for ASICs in terms of area and power. We employ a power analysis framework and load profiles that provide accurate power figures. Furthermore, we analyze the power behavior in normal operation as well as under errors. Experiments show that the employed error detection and retransmission schemes in our NoC contribute low power overhead when compared to previously proposed scheme.\",\"PeriodicalId\":366264,\"journal\":{\"name\":\"2017 30th IEEE International System-on-Chip Conference (SOCC)\",\"volume\":\"68 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 30th IEEE International System-on-Chip Conference (SOCC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOCC.2017.8226034\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 30th IEEE International System-on-Chip Conference (SOCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCC.2017.8226034","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5

摘要

随着容错片上网络(noc)在可靠系统中的普及,必须准确地评估它们的开销。在本文中,我们从面积和功耗方面评估了用于asic的软错误弹性实时NoC路由器的开销。我们采用功率分析框架和负载配置文件,提供准确的功率数据。此外,我们还分析了在正常工作和错误情况下的功率行为。实验表明,与先前提出的方案相比,我们的NoC中采用的错误检测和重传方案具有较低的功耗开销。
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Power and area evaluation of a fault-tolerant network-on-chip
As fault-tolerant Networks-on-Chip (NoCs) become prevalent in reliable systems, their overhead must be accurately evaluated. In this paper, we evaluate the overhead of a soft error resilient real-time NoC router for ASICs in terms of area and power. We employ a power analysis framework and load profiles that provide accurate power figures. Furthermore, we analyze the power behavior in normal operation as well as under errors. Experiments show that the employed error detection and retransmission schemes in our NoC contribute low power overhead when compared to previously proposed scheme.
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