一种采用前馈失调抵消限制放大器的2v CMOS 455 kHz FM/FSK解调器

Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434) Pub Date : 2000-08-28 DOI:10.1109/APASIC.2000.896932

Po-Chiun Huang, Yi-Huei Chen, Chien-Chih Liu, Chorng-Kuang Wang

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引用次数: 25

摘要

本文介绍了一种低压低功率中频455khz信号处理器，该处理器包含一个三级限幅放大器和一个调频/FSK解调器。限制放大器采用片上前馈失调抵消电路。FM/FSK解调器采用正交检测器，该检测器由片上鉴相器和外部槽移相器组成。解调常数为20mv /kHz，最大/spl + usmn/ 10khz频率偏差。中频信号处理器从单个2v电源中消耗2.3 mW，具有-72 dBm的高灵敏度。采用0.6 /spl mu/m的数字CMOS技术，占据0.2 mm/sup / m2的有效面积。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A 2-V CMOS 455 kHz FM/FSK demodulator using feedforward offset cancellation limiting amplifier

This paper presents a low-voltage low-power IF 455 kHz signal processor that contains a three-stage limiting amplifier and an FM/FSK demodulator. The limiting amplifier uses an on-chip feedforward offset cancellation circuit. The FM/FSK demodulator employs a quadrature detector that is composed of an on-chip phase detector and an external tank phase shifter. The demodulation constant is 20 mV/kHz with maximum /spl plusmn/10 kHz frequency deviation. The IF signal processor that consumes 2.3 mW from a single 2-V power supply demonstrates a high sensitivity of -72 dBm. It occupies an active area of 0.2 mm/sup 2/ using 0.6 /spl mu/m digital CMOS technology.

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Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434)

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