{"title":"纳米级块体finfet的设计与分析","authors":"Jong-Ho Lee, Kyu-Bong Choi, Jongmin Shin","doi":"10.1109/ASICON.2013.6811940","DOIUrl":null,"url":null,"abstract":"Design of 14 nm bulk FinFET is discussed and some properties are analyzed physically. The source/drain junction depth is the most important parameter to reduce off-current, and a punchthrough barrier of a peak concentration higher than ~2×1018 cm-3 should be formed just underneath the junction depth at the same time. Uniform body doping concentration needs to be designed to have a doping in the range of 2~4×1017 cm-3. The source/drain contact resistance can be reduced by increasing metal contact area on the source/drain region. The drain current fluctuation with the capture and emission of an electron in a trap inside the gate oxide is less than 2% at a VGS-Vth of 0.1 V, and increases slightly due to the increase of coupling as fin width decreases.","PeriodicalId":150654,"journal":{"name":"2013 IEEE 10th International Conference on ASIC","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design and analysis of nano-scale bulk FinFETs\",\"authors\":\"Jong-Ho Lee, Kyu-Bong Choi, Jongmin Shin\",\"doi\":\"10.1109/ASICON.2013.6811940\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Design of 14 nm bulk FinFET is discussed and some properties are analyzed physically. The source/drain junction depth is the most important parameter to reduce off-current, and a punchthrough barrier of a peak concentration higher than ~2×1018 cm-3 should be formed just underneath the junction depth at the same time. Uniform body doping concentration needs to be designed to have a doping in the range of 2~4×1017 cm-3. The source/drain contact resistance can be reduced by increasing metal contact area on the source/drain region. The drain current fluctuation with the capture and emission of an electron in a trap inside the gate oxide is less than 2% at a VGS-Vth of 0.1 V, and increases slightly due to the increase of coupling as fin width decreases.\",\"PeriodicalId\":150654,\"journal\":{\"name\":\"2013 IEEE 10th International Conference on ASIC\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 IEEE 10th International Conference on ASIC\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASICON.2013.6811940\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE 10th International Conference on ASIC","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASICON.2013.6811940","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design of 14 nm bulk FinFET is discussed and some properties are analyzed physically. The source/drain junction depth is the most important parameter to reduce off-current, and a punchthrough barrier of a peak concentration higher than ~2×1018 cm-3 should be formed just underneath the junction depth at the same time. Uniform body doping concentration needs to be designed to have a doping in the range of 2~4×1017 cm-3. The source/drain contact resistance can be reduced by increasing metal contact area on the source/drain region. The drain current fluctuation with the capture and emission of an electron in a trap inside the gate oxide is less than 2% at a VGS-Vth of 0.1 V, and increases slightly due to the increase of coupling as fin width decreases.