28.6 A 78.5dB-SNDR耐辐射和亚稳两步分体式SAR ADC，工作速度高达75MS/s，功耗为24.9mW，采用65nm CMOS

2017 IEEE International Solid-State Circuits Conference (ISSCC) Pub Date : 2017-02-01 DOI:10.1109/ISSCC.2017.7870468

Hongda Xu, Y. Cai, L. Du, Yuan Zhou, Benwei Xu, D. Gong, J. Ye, Y. Chiu

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引用次数: 12

摘要

高分辨率、低功耗耐辐射adc在医疗、航空航天和高能物理应用领域有着巨大的需求。在CERN大型强子对撞机实验的ATLAS液氩量热计中，辐射工作条件加上大动态范围(>12b ENOB)、40-80MS/s采样率和低功耗(满足冷却系统要求)规格[1]，使得adc的设计非常具有挑战性。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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28.6 A 78.5dB-SNDR radiation- and metastability-tolerant two-step split SAR ADC operating up to 75MS/s with 24.9mW power consumption in 65nm CMOS

High-resolution, low-power radiation-tolerant ADCs are under great demand from medical, aerospace and high-energy physics applications. In the ATLAS Liquid Argon Calorimeter of the LHC experiment at CERN, the radiation operation condition coupled with the large dynamic range (>12b ENOB), 40-80MS/s sample rate and low power (for cooling system requirement) specs [1] make the design of such ADCs a very challenging task.

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2017 IEEE International Solid-State Circuits Conference (ISSCC)

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