{"title":"大功率led的PC板热管理","authors":"J. Yu, W. Oepts, H. Konijn","doi":"10.1109/STHERM.2008.4509368","DOIUrl":null,"url":null,"abstract":"Increasing requirements of closely packed high power LEDs pose challenges for PC board thermal management. This paper presents a cost-effective thermal solution using FR4 based PCB technology and filled and capped vias. This robust technology enables superior thermal performance on board level for closely packed power LEDs. No solder joint or board level reliability failures were found during a temperature cycling test (TCT) from -40degC to 125degC after 1000 cycles. Moreover no solder joint and board level failure was found after 4000 cycles for open via FR4 when monitoring changes of board thermal resistance. Trade-offs are given for board thermal resistance versus packing density, various board designs, PCB technology, solder joint reliability and PCB board level reliability including open vias and filled and capped vias.","PeriodicalId":285718,"journal":{"name":"2008 Twenty-fourth Annual IEEE Semiconductor Thermal Measurement and Management Symposium","volume":"151 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-03-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"16","resultStr":"{\"title\":\"PC Board Thermal Management of High Power LEDs\",\"authors\":\"J. Yu, W. Oepts, H. Konijn\",\"doi\":\"10.1109/STHERM.2008.4509368\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Increasing requirements of closely packed high power LEDs pose challenges for PC board thermal management. This paper presents a cost-effective thermal solution using FR4 based PCB technology and filled and capped vias. This robust technology enables superior thermal performance on board level for closely packed power LEDs. No solder joint or board level reliability failures were found during a temperature cycling test (TCT) from -40degC to 125degC after 1000 cycles. Moreover no solder joint and board level failure was found after 4000 cycles for open via FR4 when monitoring changes of board thermal resistance. Trade-offs are given for board thermal resistance versus packing density, various board designs, PCB technology, solder joint reliability and PCB board level reliability including open vias and filled and capped vias.\",\"PeriodicalId\":285718,\"journal\":{\"name\":\"2008 Twenty-fourth Annual IEEE Semiconductor Thermal Measurement and Management Symposium\",\"volume\":\"151 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-03-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"16\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 Twenty-fourth Annual IEEE Semiconductor Thermal Measurement and Management Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/STHERM.2008.4509368\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 Twenty-fourth Annual IEEE Semiconductor Thermal Measurement and Management Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/STHERM.2008.4509368","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Increasing requirements of closely packed high power LEDs pose challenges for PC board thermal management. This paper presents a cost-effective thermal solution using FR4 based PCB technology and filled and capped vias. This robust technology enables superior thermal performance on board level for closely packed power LEDs. No solder joint or board level reliability failures were found during a temperature cycling test (TCT) from -40degC to 125degC after 1000 cycles. Moreover no solder joint and board level failure was found after 4000 cycles for open via FR4 when monitoring changes of board thermal resistance. Trade-offs are given for board thermal resistance versus packing density, various board designs, PCB technology, solder joint reliability and PCB board level reliability including open vias and filled and capped vias.