E. Castillo, D. Morales, A. Martínez-Olmos, D. Alvarez, L. Parrilla, A. Palma, F. Navello
{"title":"可重构应用的FPGA参数化ECT处理","authors":"E. Castillo, D. Morales, A. Martínez-Olmos, D. Alvarez, L. Parrilla, A. Palma, F. Navello","doi":"10.1109/DCIS.2015.7388591","DOIUrl":null,"url":null,"abstract":"A FPGA dedicated processor for the digital processing of the acquired signal in electrical capacitance tomography systems is presented. The objective of this IP core is to generate an adaptable and portable prototype which is meant to work with the acquisition electronics, i.e., this whole system offers an instrument suitable to be easily transported and applied to different ECT sensors and scenarios with no need of hardware redesign. A previous developed prototype of the acquisition electronics based on a Programmable System on Chip (PSoC) has been used for the readings of the inter-electrode capacitance values. The measurements are sent through a serial communication to an FPGA, where the permittivity distribution is reconstructed using a VHDL design.","PeriodicalId":191482,"journal":{"name":"2015 Conference on Design of Circuits and Integrated Systems (DCIS)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Parametrized ECT processing over FPGA for a reconfigurable application\",\"authors\":\"E. Castillo, D. Morales, A. Martínez-Olmos, D. Alvarez, L. Parrilla, A. Palma, F. Navello\",\"doi\":\"10.1109/DCIS.2015.7388591\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A FPGA dedicated processor for the digital processing of the acquired signal in electrical capacitance tomography systems is presented. The objective of this IP core is to generate an adaptable and portable prototype which is meant to work with the acquisition electronics, i.e., this whole system offers an instrument suitable to be easily transported and applied to different ECT sensors and scenarios with no need of hardware redesign. A previous developed prototype of the acquisition electronics based on a Programmable System on Chip (PSoC) has been used for the readings of the inter-electrode capacitance values. The measurements are sent through a serial communication to an FPGA, where the permittivity distribution is reconstructed using a VHDL design.\",\"PeriodicalId\":191482,\"journal\":{\"name\":\"2015 Conference on Design of Circuits and Integrated Systems (DCIS)\",\"volume\":\"6 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 Conference on Design of Circuits and Integrated Systems (DCIS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DCIS.2015.7388591\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 Conference on Design of Circuits and Integrated Systems (DCIS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DCIS.2015.7388591","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Parametrized ECT processing over FPGA for a reconfigurable application
A FPGA dedicated processor for the digital processing of the acquired signal in electrical capacitance tomography systems is presented. The objective of this IP core is to generate an adaptable and portable prototype which is meant to work with the acquisition electronics, i.e., this whole system offers an instrument suitable to be easily transported and applied to different ECT sensors and scenarios with no need of hardware redesign. A previous developed prototype of the acquisition electronics based on a Programmable System on Chip (PSoC) has been used for the readings of the inter-electrode capacitance values. The measurements are sent through a serial communication to an FPGA, where the permittivity distribution is reconstructed using a VHDL design.