N. Ayaki, T. Shimura, K. Hosogi, T. Kato, Y. Nakajima, Masayuki Sakai, Y. Kohno, H. Nakano, N. Tanino
{"title":"一种采用自对准门态MESFET的12ghz频段超低噪声放大器","authors":"N. Ayaki, T. Shimura, K. Hosogi, T. Kato, Y. Nakajima, Masayuki Sakai, Y. Kohno, H. Nakano, N. Tanino","doi":"10.1109/MCS.1989.37250","DOIUrl":null,"url":null,"abstract":"The design and fabrication of a 12-GHz-band, 4-stage, monolithic super-low-noise amplifier using self-aligned multilayer gate FETs is described. The device uses a self-aligned multilayer gate FET (SAMFET) with a LDD structure and a buried p-layer. The 0.3- mu m-gate FET used in the amplifier produces a typical noise figure of 1.07 dB with an associated gain of 9.0 dB at 12 GHz. The amplifier gives a minimum noise figure of 1.58 dB with a gain of 29 dB at 12 GHz: the noise figure is less than 1.76 dB with an associated gain as high as 28 dB in the frequency range from 11.7 to 12.7 GHz.<<ETX>>","PeriodicalId":377911,"journal":{"name":"Digest of Papers.,Microwave and Millimeter-Wave Monolithic Circuits Symposium","volume":"45 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":"{\"title\":\"A 12 GHz-band super low-noise amplifier using a self-aligned gate MESFET\",\"authors\":\"N. Ayaki, T. Shimura, K. Hosogi, T. Kato, Y. Nakajima, Masayuki Sakai, Y. Kohno, H. Nakano, N. Tanino\",\"doi\":\"10.1109/MCS.1989.37250\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The design and fabrication of a 12-GHz-band, 4-stage, monolithic super-low-noise amplifier using self-aligned multilayer gate FETs is described. The device uses a self-aligned multilayer gate FET (SAMFET) with a LDD structure and a buried p-layer. The 0.3- mu m-gate FET used in the amplifier produces a typical noise figure of 1.07 dB with an associated gain of 9.0 dB at 12 GHz. The amplifier gives a minimum noise figure of 1.58 dB with a gain of 29 dB at 12 GHz: the noise figure is less than 1.76 dB with an associated gain as high as 28 dB in the frequency range from 11.7 to 12.7 GHz.<<ETX>>\",\"PeriodicalId\":377911,\"journal\":{\"name\":\"Digest of Papers.,Microwave and Millimeter-Wave Monolithic Circuits Symposium\",\"volume\":\"45 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1989-06-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"12\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Digest of Papers.,Microwave and Millimeter-Wave Monolithic Circuits Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MCS.1989.37250\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Digest of Papers.,Microwave and Millimeter-Wave Monolithic Circuits Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MCS.1989.37250","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 12 GHz-band super low-noise amplifier using a self-aligned gate MESFET
The design and fabrication of a 12-GHz-band, 4-stage, monolithic super-low-noise amplifier using self-aligned multilayer gate FETs is described. The device uses a self-aligned multilayer gate FET (SAMFET) with a LDD structure and a buried p-layer. The 0.3- mu m-gate FET used in the amplifier produces a typical noise figure of 1.07 dB with an associated gain of 9.0 dB at 12 GHz. The amplifier gives a minimum noise figure of 1.58 dB with a gain of 29 dB at 12 GHz: the noise figure is less than 1.76 dB with an associated gain as high as 28 dB in the frequency range from 11.7 to 12.7 GHz.<>
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